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lesson cache-obliviousmemory-hierarchyveb-layout

Cache-Aware vs Cache-Oblivious Layouts (van Emde Boas Layout)

7 min read Module 1.1: Asymptotic Analysis, Recurrences & Memory Hierarchy Updated Oct 23, 2026
📄 Cheat Sheet
MIT 6.851 Lecture 7: Cache-Oblivious Data Structures (van Emde Boas Layout)
MIT OpenCourseWare MIT 6.851 Lecture 7: Cache-Oblivious Data Structures (van Emde Boas Layout) Watch on YouTube ↗

Erik Demaine derives the Ideal-Cache (tall-cache) model, recursive matrix transposition, and the van Emde Boas tree layout achieving O(log_B N) memory transfers.

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The Ideal-Cache Model $(M, B)$ & Recursive Divide-and-Conquer

The Cache-Oblivious (Ideal-Cache) Model analyzes algorithms on a two-level memory hierarchy with cache capacity $M$ words and cache-line block size $B$ words (assuming the tall-cache condition $M = \Omega(B^2)$ and optimal offline replacement, which LRU matches within a factor of 2). The algorithm knows neither $M$ nor $B$. How can an algorithm optimize for an unknown $B$? By recursing all the way down to $O(1)$ base cases! At some level of the recursion tree, the subproblem size natively drops below $M$ (fitting in cache) and below $B$ (fitting in a single cache line).

Consider two flagship applications of cache-oblivious design:

  • 1. Static Binary Search Trees (van Emde Boas Layout): A standard pointer-based BST or even a breadth-first (BFS / Eytzinger) heap array incurs $\Theta(\log_2 N)$ cache misses per query once search depth exceeds cache capacity, because jumping from index $i$ to $2i$ leaps across distant cache lines at the bottom of the tree. The van Emde Boas (vEB) layout recursively cuts a tree of height $h$ at mid-height $h/2$ into one top subtree $T_0$ of height $h/2$ (size $\approx \sqrt{N}$) and $\approx \sqrt{N}$ bottom subtrees $T_1, \dots, T_k$ of height $h/2$, storing [T_0][T_1][T_2]...[T_k] contiguously in memory. At the recursion level where subtree size $\le B$, each small subtree of height $\approx \frac{1}{2} \log_2 B$ sits inside a single cache line! Thus a root-to-leaf search of $\log_2 N$ steps crosses only: $$Q(N) = \frac{\log_2 N}{\frac{1}{2} \log_2 B} = O(\log_B N) \text{ cache misses!}$$
  • 2. Cache-Oblivious Matrix Multiplication & Transposition: Naive loop for i..for j: B[j][i] = A[i][j] scans $A$ row-wise (stride 1, $N^2/B$ misses) but writes $B$ column-wise (stride $N$, $N^2$ misses!). Recursively splitting the larger dimension in half ($A_{11}, A_{12}, A_{21}, A_{22}$) until submatrices fit in L1 cache reduces misses to the optimal $\Theta(1 + N^2 / B)$.
Static Search / Matrix Layout Knows $B, M$? Cache Misses $Q(N)$ L1/L3 Multi-Level Optimal? Key Structural Mechanism
Pointer-Chasing BST No $\Theta(\log_2 N)$ No (1 miss per pointer hop) Random heap addresses defeat cache lines
Implicit BFS / Eytzinger Array No $\Theta(\log_2 N - \log_2 M)$ Top fits in L1; bottom jumps $2i$ Children $2i, 2i+1$ are $O(N)$ apart at leaves
B-Tree (Page-Tuned Node Size $B$) Yes (Cache-Aware) $\Theta(\log_B N)$ Tuned to 1 tier (e.g., 4KB SSD or 64B L1) Stores $B - 1$ keys per contiguous node
van Emde Boas (vEB) Recursive Layout No (Cache-Oblivious) $\Theta(\log_B N)$ Yes (L1, L2, L3, TLB & Disk!) Recursive $\sqrt{N}$ subtree clustering

Formal Specification: Proof of $O(\log_B N)$ Cache Transfers in vEB Layout

In the recursive van Emde Boas tree layout, we repeatedly halve the tree height $h \to h/2 \to h/4 \dots$ until reaches the first recursion depth where a subtree of height $k$ contains $2^k - 1 \le B$ nodes. Specifically, $\frac{1}{2}\log_2(B + 1) < k \le \log_2(B + 1)$.

Because each such base-level subtree of height $k$ occupies a contiguous slice of $\le B$ words in the array, it spans at most 2 cache lines regardless of its byte alignment. Any root-to-leaf search path of length $\log_2 N$ traverses $k$ tree levels inside each contiguous subtree before jumping to a child subtree, requiring at most $\lceil (\log_2 N) / k \rceil$ subtree transitions:

$$Q(N) \le 2 \cdot \left\lceil \frac{\log_2 N}{\frac{1}{2}\log_2(B + 1)} \right\rceil = 4 \log_B N + O(1) = \Theta(\log_B N)$$

Visualizing the Recursive van Emde Boas Tree Slicing

Notice how cutting a height-$h$ tree horizontally at depth $h/2$ packs the top triangle $T_0$ into array indices $[0 .. \sqrt{N}-1]$, followed immediately by each bottom triangle $T_1, T_2, \dots$ contiguously.

T₀ (h/2) T₁ T₂ T₃ Cut at h/2 (√N nodes) Linearized Contiguous Memory Array T₀ (Top) T₁ T₂ T₃ • Each T_i is laid out recursively using the exact same rule. • Subtrees of size ≤ B sit in 1 cache line (0 pointer overhead). • Optimal O(log_B N) across L1 (64B), L2, L3, and SSD (4KB)!
flowchart TD M["Transpose Submatrix A[r0..r1, c0..c1]"] --> Base{"max(H, W) ≤ 16 (Fits in L1)?"} Base -- "Yes" --> Tile["Execute Direct Register Tile Loop"] Base -- "No" --> Split{"Is Height H ≥ Width W ?"} Split -- "Yes (Split Rows)" --> Rows["Recurse Top Half + Recurse Bottom Half"] Split -- "No (Split Cols)" --> Cols["Recurse Left Half + Recurse Right Half"]
CPU 64-Byte Cache Line & Stride Locality Simulator
64B Cache Line (8 × 8B)

Compare contiguous stride-1 traversal (1 cache miss per 8 elements, ~4 cycles L1 hit) against stride-8 and heap pointer-chasing (100% cache misses, ~200 cycles RAM stall).

Step 1 / 12
Custom Input:
Timeline

Invariant & State

Access index [0] (Cache Line #0): Cold Cache Line Miss (+DRAM stall)
📊 Live Magnitude & Pointer Stage — CPU 64-Byte Cache Line & Stride Locality Simulator Active Pivot Match/Sorted
MISS (D 12 [0x1000] In L1 45 [0x1008] In L1 78 [0x1010] In L1 23 [0x1018] In L1 56 [0x1020] In L1 89 [0x1028] In L1 34 [0x1030] In L1 67 [0x1038] Cold 91 [0x1040] Cold 14 [0x1048] Cold 29 [0x1050] Cold 63 [0x1058] Cold 82 [0x1060] Cold 37 [0x1068] Cold 50 [0x1070] Cold 74 [0x1078]
Cache Line #0 (64 Bytes = 8 × int64) — RESIDENT IN L1 CACHE
0x1000 12 MISS (DRAM)
0x1008 45 In L1
0x1010 78 In L1
0x1018 23 In L1
0x1020 56 In L1
0x1028 89 In L1
0x1030 34 In L1
0x1038 67 In L1
Cache Line #1 (64 Bytes = 8 × int64) — NOT IN L1
0x1040 91 Cold
0x1048 14 Cold
0x1050 29 Cold
0x1058 63 Cold
0x1060 82 Cold
0x1068 37 Cold
0x1070 50 Cold
0x1078 74 Cold
Accesses
1 / 12
L1 Cache Hits
0
Cache Misses
1
Cumulative Cycles
60 cy (~60.0 cy/op)
[Step 1] Read A[0] = 12 at 0x1000 -> CACHE LINE FILL (fetched 64B block)

Hardware Reality: Eytzinger (BFS) Array vs vEB Layout in Modern RAM ($N \le 10^7$)

While the van Emde Boas layout is asymptotically optimal ($O(\log_B N)$ vs $O(\log_2 N)$ for Eytzinger), computing child indices in a vEB array requires bit-reversal / hyperfloor table lookups, whereas the 1-indexed Eytzinger (BFS) layout computes children via a single 1-cycle shift: left = 2*i, right = 2*i + 1. Furthermore, Paul-Virak Khuong and Pat Morin (2017) demonstrated that in an Eytzinger array, issuing an explicit software prefetch __builtin_prefetch(&a[i * 16]) four levels ahead hides DRAM latency across 4 concurrent Line Fill Buffers, making Eytzinger faster than both std::lower_bound and vEB for in-memory tables up to $N = 10^7$!

Production Implementation: Cache-Oblivious Matrix Transposition & Prefetched Eytzinger Search

The C++20 code below implements both the cache-oblivious recursive matrix transpose and Khuong-Morin's branchless, prefetched Eytzinger array search.

// C++20: Cache-Oblivious Matrix Transpose + Branchless Eytzinger Search
#include <bit>
#include <cstddef>
#include <cstdint>

// 1. Cache-Oblivious Matrix Transpose: O(H*W) work, optimal O(1 + H*W / B) cache misses
// Works across L1, L2, L3, and TLB without knowing B or M!
void transposeOblivious(const float* __restrict src, float* __restrict dst,
                        size_t N, size_t r0, size_t r1, size_t c0, size_t c1) noexcept {
    const size_t H = r1 - r0;
    const size_t W = c1 - c0;
    if (H <= 16 && W <= 16) {
        for (size_t r = r0; r < r1; ++r) {
            for (size_t c = c0; c < c1; ++c) {
                dst[c * N + r] = src[r * N + c];
            }
        }
        return;
    }
    if (H >= W) {
        size_t rMid = r0 + H / 2;
        transposeOblivious(src, dst, N, r0, rMid, c0, c1);
        transposeOblivious(src, dst, N, rMid, r1, c0, c1);
    } else {
        size_t cMid = c0 + W / 2;
        transposeOblivious(src, dst, N, r0, r1, c0, cMid);
        transposeOblivious(src, dst, N, r0, r1, cMid, c1);
    }
}

// 2. Khuong & Morin (2017): Branchless Eytzinger (1-indexed BFS) Binary Search
// Prefetches 4 tree levels ahead (16 contiguous grandchildren = one 64B cache line!)
size_t eytzingerLowerBound(const int32_t* a, size_t n, int32_t target) noexcept {
    size_t k = 1;
    while (k <= n) {
        __builtin_prefetch(a + k * 16); // Prefetch entire 64B cache line 4 levels down!
        k = 2 * k + (a[k] < target);    // Branchless CMOV/ADC index descent
    }
    // Decode original answer index by stripping trailing 1-bits from path k
    k >>= std::countr_one(k) + 1;
    return k;
}

Failure Modes & Adversarial Pitfalls

  • Power-of-Two Matrix Stride Cache-Associativity Thrashing: In a row-major matrix of dimension $N = 1024$ (float, $4096\text{ B}$ per row), elements in the same column A[r][c] and A[r+1][c] are separated by exactly $4096\text{ bytes}$—which maps to the exact same L1 cache set in an 8-way set-associative 32 KB L1 cache! Even a tiled or recursive transpose can suffer conflict misses after 8 rows unless you pad the leading dimension (lda = N + 16) or copy tiles into a contiguous scratch buffer.
  • Using Static vEB Layouts for Write-Heavy Dynamic Workloads: A standard vEB array is compact (density 1.0), meaning a single insertion requires shifting $O(N)$ elements unless paired with an Itai-Konheim-Rodeh Packed Memory Array (PMA), which adds $O(\log^2 N)$ amortized rebalancing overhead.
Check yourself Question 1 of 4
Concept Check Defining Property of a Cache-Oblivious Algorithm recall

What distinguishes a cache-oblivious algorithm (in the Frigo-Leiserson-Prokop-Ramachandran Ideal-Cache model) from a cache-aware algorithm?

⚡ Interactive Challenge · Staff Level

Algorithmic Design & Complexity Check

Analyze the invariant, asymptotic bound, and hardware behavior before selecting.

In a 1-indexed Eytzinger (BFS) search array where `left(k) = 2k` and `right(k) = 2k + 1`, why does issuing `__builtin_prefetch(a + k * 16)` inside the search loop `k = 2*k + (a[k] < target)` dramatically accelerate searches for `N = 10^7` `int32_t` keys?

Key Takeaways

Cache-oblivious algorithms contain no tuning parameters for cache line size B or capacity M, yet achieve optimal O(log_B N) or O(N^2 / B) memory transfers across all cache levels simultaneously.
The van Emde Boas (vEB) layout recursively slices a tree at height h/2 into a top subtree of size √N and √N bottom subtrees, clustering subtrees of size ≤ B into a single cache line.
Recursive matrix transposition splits the larger dimension (H vs W) down to a 16×16 base tile, reducing column-write cache misses from Θ(N^2) to Θ(N^2 / B).
For in-memory search (N ≤ 10^7), the 1-indexed Eytzinger BFS layout with 4-level lookahead prefetching (a + 16*k) outperforms pointer-based BSTs and standard binary search.
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